NRZS
VHDL
NRZ(S) | NRZS | Non-return-to-zero space | Serializer mapping {0: toggle, 1: constant}. |
Encoder
library ieee;
use ieee.std_logic_1164.all;
entity nrzs_encoder is
port(
clk :in std_logic;
d :in std_logic;
q :out std_logic
);
end entity;
architecture rtl of nrzs_encoder is
function nrzi_s(
signal curr :in std_logic;
signal prev :in std_logic
) return std_logic is
if (curr = '0') then
return not prev;
else
return prev;
end if;
end function;
begin
process(clk)
begin
q <= nrzi_s(d, q);
end process;
end architecture;
Decoder
entity nrzi_decoder is
port(
clk :in std_logic;
d :in std_logic;
q :out std_logic
);
end entity;
architecture rtl of nrzi_decoder is
signal lastd :std_logic := '0';
begin
process(clk)
begin
if (rising_edge(clk)) then
if (d = lastd) then
q <= '0';
else
q <= '1';
end if;
lastd <= d;
end if;
end process;
end architecture;