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=={{header|MIPS Assembly}}== |
=={{header|MIPS Assembly}}== |
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===Delay Slots=== |
===Delay Slots=== |
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Due to the way MIPS's instruction pipeline works, an instruction after a branch is executed during the branch, ''even if the branch is taken.'' |
Due to the way MIPS's instruction pipeline works, an instruction placed after a branch instruction is executed during the branch, ''even if the branch is taken.'' |
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<lang mips>move $t0,$zero ;load 0 into $t0 |
<lang mips>move $t0,$zero ;load 0 into $t0 |
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