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Talk:Four bit adder: Difference between revisions

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You might want to look at [http://www.systemc.org/home/ SystemC]. It is a free library and methodology for simulating digital designs in C++. Although the library and its simulator exist in a free form, you will of course have to pay if you were wanting to, say, Synthesize your design down to gates; and commercial SystemC simulators make it so much more easy to debug and navigate your design. --[[User:Paddy3118|Paddy3118]] 18:56, 28 July 2010 (UTC)
 
==Logic Simulators==
 
A quick note on how a logic simulator provides the illusion of parallelism needed to a typical logic circuit: a technique known as a "two list simulator". The "circuit" is represented by a set of objects that represent the components, and a second set the represent the wires (connectivity). Simulation proceeds in two phases: first, we tell each component to update its outputs based on the current value of its inputs. Next, we tell each wire to propagate the output of the upstream component to the input of the downstream component(s). While doing this, we note if any values actually change -- if none do then the current timestep is done (as an optimization, only those components whose inputs have changed are updated on each iteration). The term "two list simulation" comes the need to maintain these two sets of things to update: the components, and the wires..
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