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Memory allocation: Difference between revisions
→{{header|360 Assembly}}
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DC A(STG@) Pointer to Address of Storage Area
DC X'0000' (Unconditional Request; Subpool 0)
</lang>
Example below shows de facto modern day use of HLASM techniques:
* The code is "baseless", meaning no base register has been established for the entry point of the module. This is referred to as Relative addressing. All modern day z/OS compilers generate baseless code, and so should the "raw assembler programmer". The IEABRCX system macro will conveniently convert all based branch instructions to their relative equivalents.
* The STORAGE macro is used (PC call to the storage routine) instead of GETMAIN/FREEMAIN (SVC based. Stabilised (no new functions).
* One of the many functions of STORAGE over GETMAIN/FREEMAIN is illustrated: EXECUTABLE=NO. The code below will execute successfully if EXECUTABLE=YES (or defaulted to), or if running on a pre z14 machine. If on a z14 or newer machine and EXECUTABLE=NO then the module will ABEND S0C4-4.
* The code whows the use of the system supplied linkage stack to save caller's registers (BAKR) and restore them on return (PR), as opposed to STM/LM of the caller's register contents.
<lang 360 Assembly>
STOREXNO CSECT ,
STOREXNO AMODE 31
STOREXNO RMODE ANY
STOREXNO CSECT ,
SYSSTATE AMODE64=NO,ARCHLVL=3 gen z9+, z/OS 2.1+ bin code
IEABRCX DEFINE convert based to relative branches
BAKR 14,0 callers registers to linkage stack
LARL 12,CONSTANTS load address relative long
USING CONSTANTS,12 using for constants
LA 9,WALEN load memory length in Register 9
STORAGE OBTAIN,LENGTH=(9),EXECUTABLE=NO,LOC=ANY
LR 10,1 Reg1 holds address of mem area
USING DYNAREA,10 using for dynamic memory area
LA 13,SAVEA PC routine convention: ...
MVC SAVEA+4(4),=C'F1SA' ... format 1 savearea: L-stack
*
* copy instruction sequence SR Reg15,Reg15; Branch Reg14 to DATA1
* in obtained storage location, and branch to it
*
MVC DATA1(8),=X'1BFF07FE00000000' SR 15,15; BR 14
LA 7,DATA1
BASR 14,7 This will OC4-4 with EXECUTABLE=NO
STORAGE RELEASE,ADDR=(10),LENGTH=(9),EXECUTABLE=NO
PR , return to caller
CONSTANTS DS 0D constant section, aligned for LARL
DC C'SOMEDATA'
DC C'SOMEOTHERDATA'
LTORG , have assembler build literal pool
DYNAREA DSECT
SAVEA DS 18F
DATA1 DS 2F
DATA2 DS CL256 can receive any value
WALEN EQU *-DYNAREA length of obtained area
END STOREXNO end of module
</lang>
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