Logical operations: Difference between revisions
Logical operations en Asymptote
(Logical operations en Verilog) |
(Logical operations en Asymptote) |
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a OR b = true
NOT a = false</pre>
=={{header|Asymptote}}==
<lang Asymptote>bool a = true;
bool b = false;
write(a & b);
write(a && b); //(with conditional evaluation of right-hand argument)
write(a | b);
write(a || b); //(with conditional evaluation of right-hand argument)
write(a ^ b);
write(!a);</lang>
=={{header|AutoHotkey}}==
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