Talk:Four bit adder: Difference between revisions

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:::: P.S. note that that latch function really needs to be run twice to reach steady state. However, because I made one gate faster than the other, this is only apparent some of the time. --[[User:Rdm|Rdm]] 13:28, 18 June 2010 (UTC)
::::: This is interesting, I will reconsider the whole topics once healed by failing with vhdl quick-attempts with found free (as in beer and as in speech) tools... --[[User:ShinTakezou|ShinTakezou]] 17:47, 28 July 2010 (UTC)
 
== On Digital Simulators ==
Hi ShinTakezou, I've been using digital simulators for a number of decades now, and work for a company - Infineon Technologies, That has several microprocessor designs. You might want to look at transaction based modelling for a 'higher level' model of a processor. In the industry we might juggle several models of the same design, each with their own trade-offs.
 
* At the lowest level you would have a model of the masks used to selectively expose the chip.
* Higher up, you might model the individual, interconnected transistors.
* Higher up you might model the individual gates of design (where the magic of how the gates work is only needed by the person who creates the gate libraries).
* Higher up you have RTL; register transfer level modelling where a designer might create registers and clocks and model data transfer and modifications w.r.t. clocks - most digital design is done at this level using the Verilog and VHDL languages.<br> Synthesis and then layout tools are used to translate RTL to gate and then to silicon masks.
* Higher up than RTL lie so-called behavioural modelling simulators and languages/language libraries and methodologies.
 
You might want to look at [http://www.systemc.org/home/ SystemC]. It is a free library and methodology for simulating digital designs in C++. Although the library and its simulator exist in a free form, you will of course have to pay if you were wanting to, say, Synthesize your design down to gates; and commercial SystemC simulators make it so much more easy to debug and navigate your design. --[[User:Paddy3118|Paddy3118]] 18:56, 28 July 2010 (UTC)
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