Sum of divisors: Difference between revisions
Sum of divisors en Verilog
(Sum of divisors in various BASIC dialents) |
(Sum of divisors en Verilog) |
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Line 1,926:
IF N < 100 THEN GOTO 10
END</lang>
=={{header|Verilog}}==
<lang Verilog>module main;
integer n, p, i;
initial begin
$write("1");
for(n=2; n<=100; n=n+1) begin
p = 1 + n;
for(i=2; i<=n/2; i=i+1) if(n % i == 0) p = p + i;
$write(p);
end
$finish ;
end
endmodule</lang>
=={{header|Wren}}==
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